Referring to the drawings, FIG. 1 shows a traditional micro-sequencer 10 which is capable of either jumping to a new point in the microcode or stepping to the next microinstruction.
The prior art micro-sequencer 10 is composed of three main logical elements. The condition code multiplexor 12 is used to test one or more states (or conditions) of the system it is utilized in. The condition code multiplexor selects which of its input conditions are to be tested in response to the multiplexor address control signals from the PROM Array 12. Thus, for example, three multiplexor address signals may be used to select one of eight condition inputs to the multiplexor 12, the output of multiplexor 12 providing one signal which is fed to the enable load input of PROM Address Register/Counter 14. If the enable load signal generated by the condition code multiplexor 12 is false, the register counter 14 will respond by incrementing its contents by some fixed value, one (1) being a typical increment value. If, on the other hand, the generated enable load signal is true, the register/counter 14 will parallel load a new value from the next address field of the PROM Array 16, the prom array 16 providing the storage to contain the associated system's microprogram. Although not shown, the prom array 16 is presumed to include the intelligence of the associated system. Thus, the prom array 16 may be just a simple memory, or it may be part of a microprocessor or other type of microprogrammed digital data processor, the design of such a data processor being well known to those skilled in the art.
The major drawback of the prior art micro-sequencer 10 of FIG. 1 is in the limited number of decisions which can be made over a given amount of time. Thus, the microprogram can either step to the next instruction or jump to a new point in the microcode. If multiple conditions capable of requiring multiple actions have to be tested, then multiple increments of time must be used in testing.
It is the general object of the present invention to eliminate these and other drawbacks of the prior art by providing an improved micro-sequencer.
It is another object of the present invention to provide a micro-sequencer capable of sampling multiple test conditions.
It is yet another object of the present invention to provide a micro-sequencer which allows multiple decisions to be made in one instant of time.
It is still another object of the present invention to provide a micro-sequencer which increases the speed of operation of its associated system.
It is yet another object of the present invention to provide a micro-sequencer which provides increased speed when making decisions requiring the testing of multiple conditions.
These and other objects, features and advantages of the present invention will become more apparent from the detailed description of the preferred embodiment when read in conjunction with the drawings.